HyperLight is at the forefront of the commercialization of thin-film lithium niobate (TFLN) integrated photonics — a material and process technology that is enabling high-performance, scalable optical components across AI/datacom infrastructure, hyperscale computing, quantum computing, sensing, and beyond. Founded in 2018 and backed by leading venture capital, we’ve built a team and a platform focused on real-world mass deployment of TFLN photonics technology.
At the core of our work is the TFLN Chiplet™ platform: a modular architecture designed for scalability, manufacturability, and integration into complex systems. We partner with our customers and suppliers from concept and prototyping through mass production. We believe in integrity, innovation, collaboration, and pragmatic solutions, and we take pride in tackling hard problems with curiosity, humility, and a deep sense of care for one another.
Our growing team is looking for a Senior/Staff Physical Verification and PDK Engineer to own physical verification and design enablement for our most advanced heterogeneous integration program. You will be responsible for managing design tradeoffs and enablement across multiple material platforms and building your work into a full PDK. Photonics, TFLN, and electro-optic device experience are not required. We have deep in-house expertise and will teach you. We are hiring specifically for commercial physical verification and design enablement skills, and we welcome strong candidates from an electronic IC background.
As part of your responsibilities, you will:
• Either 6+ years of relevant work experience or equivalent experience through an advanced degree (M.S. or Ph.D.) in Electrical Engineering, Computer Engineering, Physics, or a related field.
• Own physical verification for our TFLN-on-silicon-photonics stack, including deck architecture, partitioning, hierarchy and runtime, results triage, and waiver workflow.
• Stand up and run DRC and LVS signoff using tools such as Synopsys IC Validator and Siemens Calibre.
• Lead HyperLight’s internal and cross-platform design rule checks for this platform.
• Own our heterogeneous PDK end to end — architecture, model integration, release and qualification criteria, documentation, and support.
• Serve as HyperLight’s primary technical interface to foundry and customer verification teams on rule interpretation, waivers, and deck issues.
• Support active tapeouts on this program.
• Serve as a technical expert within HyperLight to guide our engineering decisions and technical roadmap.
• Either 6+ years of relevant work experience or equivalent experience through an advanced degree (M.S. or Ph.D.) in Electrical Engineering, Computer Engineering, Physics, or a related field.
• Hands-on experience authoring and debugging production DRC and LVS rule decks in IC Validator, Calibre, or Pegasus — not only running decks written by others.
• Familiarity with Cadence Virtuoso or comparable commercial layout and PDK environments, including techfiles, PCells, compact models, and scripting (e.g., SKILL).
• Demonstrated ability to communicate professionally and effectively with foundry and customer engineering teams, including holding a technical position under pressure.
PREFERRED QUALIFICATIONS:
• Experience developing, releasing, and supporting PDKs used by external customers.
• Experience with physical verification of multi-die, 2.5D, or 3D integrated products, including interface and assembly-level checks.
• Experience with advanced-node or advanced-packaging foundry flows and design enablement.
• Experience hiring and/or growing engineers and owning a broad technical scope.