Senior PHY Design Engineer

Brightecs Innovation Pte Ltd, Singapore, Singapore

What our tracking knows about this posting

Published on 19 June 2026 · first appeared in our records on 19 September 2026.

Stable posting: first seen on 19 September 2026, with no abnormal reposting.

This posting shows no salary, while 10% of open postings in the same sector in this country (Singapore) do.

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Key Responsibilities: 1. Circuit Design & Development. Design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6). Key modules: PLLs, DLLs, TX/RX channels, ODT (On-Die Termination), equalizers (CTLE/DFE), voltage regulators. Optimize power, performance, area (PPA), and signal integrity (SI). 2. Signal/Power Integrity (SI/PI) Analysis. Model and simulate channel losses, crosstalk, jitter, and eye diagrams. Ensure compliance with JEDEC standards (e.g., DDR5-6400 MT/s). Design i…

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