Key Responsibilities: Define the overall 3D-NAND memory architecture , including array organization (Plane/Bank/Page/Block structure), word line/bit line layout, shared resource strategies, etc. Lead architecture feasibility studies, technical risk assessments, and roadmap planning, promoting IP reuse, scalability design, and future technology node evolution. Design and optimize Program/erase/read algorithms , balancing speed, endurance, data retention, and interference management (such as read…